Course Syllabus 2013/2014
 
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Module : EN102
Title :
Combinational logic and sequential logic
Number of hours :
Lecture : 6.33 h
Tutorial classes : 24.00 h
Individual work : 20.00 h
ECTS credits :
2.50
Evaluation :
Teacher(s) :
DALLET Dominique
LEBRET Valery
MORIZET Guy
CURUTCHET Arnaud
JEGO Christophe - Responsible
BERHAULT Guillaume
HAROUN Ali
Shared by UV(s) :
Level :
first year module
Abstract :
Knowledges:
  • the elementary combinational and sequential function used in the digital circuits;
  • the description of digital systems with a hardware description language such as VHDL.

    Being able :

  • to specify a combinational logic and to synthesis the resulting digital circuit;
  • to specify and synthesize a counter, a finite state machine;
  • to evaluate the critical path of a complex logic function and to compute its maximal frequency.
  • Plan :
    The five lectures are given by Christophe JEGO
  • Part A - COMBINATIONAL LOGIC
  • Lecture 1 : Numeral systems, Binary arithmetic, basic logic functions, Boolean algebra, and logic function representation
  • Lecture 2 : simplification of logic equations and combinational circuit

  • Part B - SEQUENTIAL LOGIC
  • Lecture 3 : basic elements (D latch, D Flip-Flop, registers)
  • Lecture 4 : Counters ( asynchronous counters, synchronous counters, synchronous circuits)
  • Lecture 5 : Complex sequential functions (memory, Finite State Machine and FSM synthesize)

    Six laboratories are also proposed to complete the lectures. Each laboratory is splitting in two parts. During the first part, a topic is studied. Then, designed digital systems are specified with the VHDL hardware description language. It enables to gradually introduce this language.

    The topic of each laboratory is:

  • Laboratory 1 : truth table, Karnaugh map and logic gates
  • Laboratory 2 : adder, substrator and multiplier
  • Laboratory 3 : D latch, Flip-Flop and registers
  • Laboratory 4 : the synthesis of synchronous counter
  • Laboratory 5 : the synthesis of variable modulo counter
  • Laboratory 6 : the synthesis of finite state machine

  • Prerequisite :
    Nil
    Document(s) :
    Lecture notes
    Keyword(s) :
    Boolean algebra, combinational logic, elementary logic gate, sequential logic, FlipFlop, registers, finite state machine, VHDL language